Difference: MassStorage (1 vs. 23)

Revision 232019-05-30 - PeterSchmid

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Mini Boot Loader

Mini Boot Loader

Changed:
<
<		For RAM only Membership Cards you need some kind of bootstrap loader. To type in a monitor or even BASIC or FORTH is nearly impossible. Serial EEPROMs in DIP8 packages are cheap and easy to get. But you still have to use the front panel to type in the boot loader itself (this is the first-stage boot loader).
>
>		For RAM only Membership Cards you need some kind of bootstrap loader. To toggle in a monitor or even BASIC or FORTH is nearly impossible. Serial EEPROMs in DIP8 packages are cheap and easy to get. But you still have to use the front panel to toggle in the boot loader itself (this is the first-stage boot loader).
  The "patched on MC PCB" boot loader takes about 25 s for 32 KiB, the DB25 variant takes about 29 s. For the sources see https://github.com/spyren/RaspiElf/tree/master/eeprom .

Revision 222019-02-10 - PeterSchmid

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SPI EEPROMs

SPI EEPROMs

Changed:
<
<		The Serial Peripheral Interface SPI or four-wire serial bus is easy to use. The CDP1802 (MC) is the SPI master, the EEPROM is the slave. There are many different EEPROM types and sizes available e.g. !AT25M02 (2Mbit, 256 KiB, $3), 25LC1024 (128 KiB, $2), or 25LC512 (64 KiB, $1.50). All available in DIL8 packages. 64/128/256 KiB seems very small for today's standards where storage is quantified in GiB, but I think it's more than enough for a small Forth system, the size is similar to early floppy disks. If you want more memory there are 16 MiB serial Flash chips e.g. from WINBOND W25Q128J or IS25LP128F, please note they are 3.3 V devices and in SMT!
>
>		The Serial Peripheral Interface SPI or four-wire serial bus is easy to use. The CDP1802 (MC) is the SPI master, the EEPROM is the slave. There are many different EEPROM types and sizes available e.g. AT25M02 (2Mbit, 256 KiB, $3), 25LC1024 (128 KiB, $2), or 25LC512 (64 KiB, $1.50). All available in DIL8 packages. 64/128/256 KiB seems very small for today's standards where storage is quantified in GiB, but I think it's more than enough for a small Forth system, the size is similar to early floppy disks. If you want more memory there are 16 MiB serial Flash chips e.g. from WINBOND W25Q128J or IS25LP128F, please note they are 3.3 V devices and in SMT!
 
CLK   MC ->- host
MOSI  MC ->- host
Line: 26 to 26
 A high-to-low transition on the CS pin is required to start an operation and a low-to-high transition is required to end an operation.
Changed:
<
<		Invalid Opcode: If an invalid opcode is received, no data will be shifted into AT25M02 and the Serial Data
>
>		Invalid Opcode: If an invalid opcode is received, no data will be shifted into AT25M02 and the Serial Data
 Output (SO) pin will remain in a high impedance state until the falling edge of CS is detected again. This will reinitialize the serial communication.

Revision 212019-02-10 - PeterSchmid

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SPI EEPROMs

SPI EEPROMs

Changed:
<
<		The Serial Peripheral Interface SPI or four-wire serial bus is easy to use. The CDP1802 (MC) is the SPI master, the EEPROM is the slave. There are many different EEPROM types and sizes available e.g. AT25M02 (2Mbit, 256 KiB, $3), 25LC1024 (128 KiB, $2), or 25LC512 (64 KiB, $1.50). All available in DIL8 packages. 64/128/256 KiB seems very small for today's standards where storage is quantified in GiB, but I think it's more than enough for a small Forth system, the size is similar to early floppy disks. If you want more memory there are 16 MiB serial Flash chips e.g. from WINBOND W25Q128J or IS25LP128F, please note they are 3.3 V devices and in SMT!
>
>		The Serial Peripheral Interface SPI or four-wire serial bus is easy to use. The CDP1802 (MC) is the SPI master, the EEPROM is the slave. There are many different EEPROM types and sizes available e.g. !AT25M02 (2Mbit, 256 KiB, $3), 25LC1024 (128 KiB, $2), or 25LC512 (64 KiB, $1.50). All available in DIL8 packages. 64/128/256 KiB seems very small for today's standards where storage is quantified in GiB, but I think it's more than enough for a small Forth system, the size is similar to early floppy disks. If you want more memory there are 16 MiB serial Flash chips e.g. from WINBOND W25Q128J or IS25LP128F, please note they are 3.3 V devices and in SMT!
 
CLK   MC ->- host
MOSI  MC ->- host
Line: 110 to 110
 
Changed:
<
<		about 230 cycles for one byte -> 1 ms -> 1 KiB takes about 1 s @ 1.79 MHz
>
>		about 230 cycles for one byte -> 1 ms -> 1 KiB takes about 1 s @ 1.79 MHz
 

Write Byte
Line: 179 to 179
  BNZ RDBITLOOP
Changed:
<
<		about 200 cycles for one byte -> 1 ms -> 1 KiB takes about 1 s
>
>		about 200 cycles for one byte -> 1 ms -> 1 KiB takes about 1 s
 

Write Byte

Line: 205 to 205
 
EEPROM Connected to Raspberry Pi

EEPROM Connected to Raspberry Pi

Added:
>
>		I use a Raspberry Pi Zero (about $20) as an EEPROM programmer.
 
Line: 316 to 318
 

Mini Boot Loader

For RAM only Membership Cards you need some kind of bootstrap loader. To type in a monitor or even BASIC or FORTH is nearly impossible. Serial EEPROMs in DIP8 packages are cheap and easy to get. But you still have to use the front panel to type in the boot loader itself (this is the first-stage boot loader).
Changed:
<
<		The "patched on MC PCB" boot loader takes about 25 s for 32 KiB, the DB25 variant takes about 29 s. For the sources see https://github.com/spyren/RaspiElf/tree/master/eeprom .
>
>		The "patched on MC PCB" boot loader takes about 25 s for 32 KiB, the DB25 variant takes about 29 s. For the sources see https://github.com/spyren/RaspiElf/tree/master/eeprom .
 

Revision 202019-02-09 - PeterSchmid

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LPWP 0000 1000 Low Power Write Poll

Changed:
<
<
EEPROM Connected to MC's Centronics Connector (Switches and LEDs)

EEPROM Connected to MC's Centronics Connector (Switches and LEDs)

>
>
EEPROM Connected to MC's Centronics DB25 Connector (Switches and LEDs)

EEPROM Connected to MC's Centronics DB25 Connector (Switches and LEDs)

  Sharing the LED and Switch port, you loose three LEDs and one switch or IN. Possible conflict with the bootstrap loader, if there is a read sequence (CS and read pattern 0000 0011). To prevent this, set the EEPROM into HOLD state e.g. with the WAIT signal.
Line: 78 to 78
 
  21 GND 4 GND GND
Changed:
<
<
mc-eeprom-conn.png
Enlarge
Schematic
>
>
mc-eeprom-conn.png
Enlarge
Schematic
db25-eeprom-top.jpg
Enlarge
EEPROM on Veroboard
db25-eeprom-bottom.jpg
Enlarge
EEPROM on Veroboard
  Raspberry Pi can emulate SPI EEPROM. On RaspiElf the switches/LEDs are already connected to Raspi's GPIOs. No need for additional hardware. But I have to write an SPI server for the Raspberry Pi. Raspi's SPI interfaces can't be used because of conflicting port usage.
Line: 86 to 87
 

Read Byte
Changed:
<
<		 CS0 EQU 0b1101111 CS1 EQU 0b0010000 CLK0 EQU 0b1011111 CLK1 EQU 0b0100000 DATA0 EQU 0b0111111 DATA1 EQU 0b1000000

; MSB first

READBYTE: LDI 0 PLO R5 LDI 0xFF PHI R6 LDI 0xFF - 8 PLO R6 SEX R0 BITLOOP: INC R6 GHI R6 ; set CARRY SHRC GLO R5 B4 SETBIT ; branch if bit set

>
>		 LDI 01H PLO R4 ; for the carry PLO R5 ; reset all bits LDI 8 ; counting down 8 times PLO R6 ; bit counter RDBITLOOP GLO R4 ; set CARRY SHR GLO R5 ; get bits BN4 SETBIT ; branch if bit set (EF4 == 0)
  SHL ; bit not set
Changed:
<
<		 SKP SETBIT: SHLC SAVEBIT: PLO R5 OUT4 BYTE 0b01000000 ; CLK for SPI OUT4 BYTE 0b00000000
>
>		 SKP ; BR SAVEBIT SETBIT SHLC ; set bit SAVEBIT OUT P4 ; CLK on for SPI BYTE 01000000B OUT P4 ; CLK off BYTE 00000000b PLO R5 ; save bits DEC R6
  GLO R6
Changed:
<
<		 BNZ BITLOOP
>
>		 BNZ RDBITLOOP
 

about 230 cycles for one byte -> 1 ms -> 1 KiB takes about 1 s @ 1.79 MHz

Write Byte
Changed:
<
<		WRITEBYTE: LDI 0 PHI R6 LDI 8
>
>		WRITEBYTE PLO R5 ; save transmit byte LDI 8 ; counter 8 bits
  PLO R6
Changed:
<
<		 SEX R0 BITLOOP: GLO R5 ; get the next bit SHLC , next bit is in the carry
>
>		WRBITLOOP GLO R5 ; get the next bit SHL ; next bit is in the carry
  PLO R5
Changed:
<
<		 BDF SETBIT OUT P4 BYTE 0b01000000 ; CLK for SPI with data bit cleared OUT P4 BYTE 0b00000000 BR NEXT SETBIT: OUT P4 BYTE 0b11000000 ; CLK for SPI with data bit set OUT P4 BYTE 0b10000000 NEXT: DEC R6
>
>		 BDF BITSET OUT P4 ; bit cleared BYTE 00000000B OUT P4 ; clock on BYTE 01000000B OUT P4 ; clock off BYTE 00000000B BR WRTEST BITSET OUT P4 ; bit set BYTE 10000000B OUT P4 ; clock on BYTE 11000000B OUT P4 ; clock off BYTE 10000000B WRTEST DEC R6
  GLO R6
Changed:
<
<		 BNZ BITLOOP
>
>
 
EEPROM patched on MC PCB
Line: 331 to 315
 
Mini Boot Loader

Mini Boot Loader

For RAM only Membership Cards you need some kind of bootstrap loader. To type in a monitor or even BASIC or FORTH is nearly impossible. Serial EEPROMs in DIP8 packages are cheap and easy to get. But you still have to use the front panel to type in the boot loader itself (this is the first-stage boot loader).
Added:
>
>		 The "patched on MC PCB" boot loader takes about 25 s for 32 KiB, the DB25 variant takes about 29 s. For the sources see https://github.com/spyren/RaspiElf/tree/master/eeprom .
 
                        ;       TITL    "EEPROM Boot Loader for Elf Memebership Card"
                        ;               EJCT    60
Line: 523 to 511
 
META FILEATTACHMENT attachment="eeprom-bottom-s.jpg" attr="" comment="" date="1549483153" name="eeprom-bottom-s.jpg" path="eeprom-bottom-s.jpg" size="58634" user="PeterSchmid" version="1"
META FILEATTACHMENT attachment="eeprom-mc.jpg" attr="" comment="" date="1549483330" name="eeprom-mc.jpg" path="eeprom-mc.jpg" size="274595" user="PeterSchmid" version="1"
META FILEATTACHMENT attachment="mc-eeprom-u1.png" attr="" comment="" date="1549484119" name="mc-eeprom-u1.png" path="mc-eeprom-u1.png" size="18349" user="PeterSchmid" version="1"
Added:
>
>
META FILEATTACHMENT attachment="db25-eeprom-bottom.jpg" attr="" comment="" date="1549745124" name="db25-eeprom-bottom.jpg" path="db25-eeprom-bottom.jpg" size="257244" user="PeterSchmid" version="1"
META FILEATTACHMENT attachment="db25-eeprom-top.jpg" attr="" comment="" date="1549745124" name="db25-eeprom-top.jpg" path="db25-eeprom-top.jpg" size="341932" user="PeterSchmid" version="1"

Revision 192019-02-09 - PeterSchmid

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NAME
eeprom2bin - Copies the EEPROM memory to a binary file on the Raspberry Pi.
Changed:
<
<
SYNOPSIS
eeprom2bin [-s hexadr] [-e hexadr] [-p page_size] [-a address_bits] [file]
>
>
SYNOPSIS
eeprom2bin [-s hexadr] [-e hexadr] [-k size] [-p page_size] [-a address_bits] [file]
 
DESCRIPTION
Copies the EEPROM memory to a binary file (or stdout) on the Raspberry Pi. The Raspberry Pi GPIO SPI0.1 is used as interface to the SPI EEPROM (e.g. 25LC1024 has 24 bit address and 256 byte page). The generated data is written to the standard output stream or to a file. Caution: Overwrite file if it exists. Use > for redirecting (save the file) or | for piping to another command (e.g. hexdump).
size [Kibit] address bits page size [byte]
Line: 264 to 264
 
-e hexadr
end adress in hex (0x1FFFF is default)
-p number
page size in bytes (256 is default)
-a number
address bits (8, 16, or 24; 24 is default)
Added:
>
>
-k number
size in Kibit (1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048; 1024 is default)
 

bin2eeprom (upload tool)

NAME
bin2eeprom - Copies the content of binary file on the Raspberry Pi to EEPROM.
Changed:
<
<
SYNOPSIS
bin2eeprom [-s hexadr] [-e hexadr] [-p page_size] [-a address_bits] [file]
>
>
SYNOPSIS
bin2eeprom [-s hexadr] [-e hexadr] [-k size] [-p page_size] [-a address_bits] [file]
 
DESCRIPTION
Copies the content of binary file on the Raspberry Pi to EEPROM memory. The Raspberry Pi GPIO SPI0.1 is used as interface to the SPI EEPROM (e.g. 25LC1024 has 24 bit address and 256 byte page). Use < for redirecting or | for piping from another command.
size [Kibit] address bits page size [byte]
Line: 285 to 286
 
-e hexadr
end adress in hex (0x1FFFF is default)
-p number
page size in bytes (256 is default)
-a number
address bits (8, 16, or 24; 24 is default)
Added:
>
>
-k number
size in Kibit (1, 2, 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048; 1024 is default)
 

How to get and build the EEPROM tools

Revision 182019-02-09 - PeterSchmid

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  From 1024 Kibit up there are 24 address bits, 8 Kibit to 512 Kibit have 16 address bits. 1, 2, and 4 Kibit have 8 bit address bits.
Added:
>
>		SPI Serial EEPROM Family Data Sheet 25AAXXXX/25LCXXXX.
 25LCxxxx Instruction Set
Name Format Description
READ 0000 0011 Read data from memory array beginning at selected address
Line: 246 to 248
 
NAME
eeprom2bin - Copies the EEPROM memory to a binary file on the Raspberry Pi.
Changed:
<
<
SYNOPSIS
eeprom2bin [-s hexadr] [-e hexadr] [file]
>
>
SYNOPSIS
eeprom2bin [-s hexadr] [-e hexadr] [-p page_size] [-a address_bits] [file]
 
Changed:
<
<
DESCRIPTION
Copies the EEPROM memory to a binary file (or stdout) on the Raspberry Pi. The Raspberry Pi GPIO SPI0.1 is used as interface to the SPI EEPROM (24 bit address, at least a 1024 Kibit type, 256 byte page). The generated data is written to the standard output stream or to a file. Caution: Overwrite file if it exists. Use > for redirecting (save the file) or | for piping to another command (e.g. hexdump).
>
>
DESCRIPTION
Copies the EEPROM memory to a binary file (or stdout) on the Raspberry Pi. The Raspberry Pi GPIO SPI0.1 is used as interface to the SPI EEPROM (e.g. 25LC1024 has 24 bit address and 256 byte page). The generated data is written to the standard output stream or to a file. Caution: Overwrite file if it exists. Use > for redirecting (save the file) or | for piping to another command (e.g. hexdump).
size [Kibit] address bits page size [byte]
1, 2 8 16
4, 8, 16 16 16 (some 32)
32, 64 16 32
128, 256 16 64
512 16 256
1024, 2048 24 256
 
OPTIONS
Non argument options that are duplicated on the command line are not harmful. For options that require an argument, each duplication will override the previous argument value.
-s hexadr
start address in hex (0 is default)
-e hexadr
end adress in hex (0x1FFFF is default)
Added:
>
>
-p number
page size in bytes (256 is default)
-a number
address bits (8, 16, or 24; 24 is default)
 

bin2eeprom (upload tool)

NAME
bin2eeprom - Copies the content of binary file on the Raspberry Pi to EEPROM.
Changed:
<
<
SYNOPSIS
bin2eeprom [-s hexadr] [-e hexadr] [file]
>
>
SYNOPSIS
bin2eeprom [-s hexadr] [-e hexadr] [-p page_size] [-a address_bits] [file]
 
Changed:
<
<
DESCRIPTION
Copies the content of binary file on the Raspberry Pi to EEPROM memory. The Raspberry Pi GPIO SPI0.1 is used as interface to the SPI EEPROM (24 bit address, at least a 1024 Kibit type, 256 byte page). Use < for redirecting or | for piping from another command.
>
>
DESCRIPTION
Copies the content of binary file on the Raspberry Pi to EEPROM memory. The Raspberry Pi GPIO SPI0.1 is used as interface to the SPI EEPROM (e.g. 25LC1024 has 24 bit address and 256 byte page). Use < for redirecting or | for piping from another command.
size [Kibit] address bits page size [byte]
1, 2 8 16
4, 8, 16 16 16 (some 32)
32, 64 16 32
128, 256 16 64
512 16 256
1024, 2048 24 256
 
OPTIONS
Non argument options that are duplicated on the command line are not harmful. For options that require an argument, each duplication will override the previous argument value.
-s hexadr
start address in hex (0 is default)
-e hexadr
end adress in hex (0x1FFFF is default)
Added:
>
>
-p number
page size in bytes (256 is default)
-a number
address bits (8, 16, or 24; 24 is default)
 

How to get and build the EEPROM tools

Revision 172019-02-06 - PeterSchmid

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Changed:
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<		 image="/twiki/pub/Cosmac/RaspiElf/raspi-elfmemcard-s.jpg"
>
>		 image="/twiki/pub/Cosmac/MassStorage/eeprom-bottom-s.jpg"
  title="Serial EEPROMs as Mass Storage" titlestyle="color:#F00000;" }%
Line: 169 to 169
 
    4 GND GND
Changed:
<
<
mc-eeprom-u1.png
Enlarge
Schematic
>
>
mc-eeprom-u1.png
Enlarge
Schematic
eeprom-mc.jpg
Enlarge
EEPROM on Veroboard
 

Read Byte

Line: 308 to 308
 
Mini Boot Loader

Mini Boot Loader

Added:
>
>		For RAM only Membership Cards you need some kind of bootstrap loader. To type in a monitor or even BASIC or FORTH is nearly impossible. Serial EEPROMs in DIP8 packages are cheap and easy to get. But you still have to use the front panel to type in the boot loader itself (this is the first-stage boot loader).
 
                        ;       TITL    "EEPROM Boot Loader for Elf Memebership Card"
                        ;               EJCT    60
Line: 357 to 358
  ; R4.0 carry bits ; R7 destination address ; R8 length
Added:
>
>		 ; R9 start address
 
Changed:
<
<
>
>		 START
  1. c0:11000000 LBR BOOTLOADER
  2. 00:00000000
  3. 03:00000011
  BOOTLOADER
Changed:
<
<
  1. f8:11111000 LDI 080H ; set destination address
  2. 80:10000000
  3. b7:10110111 PHI R7
  4. f8:11111000 LDI 080H ; set length
>
>
  1. f8:11111000 LDI 080H ; set destination address
 
  1. 80:10000000
Changed:
<
<
  1. b8:10111000 PHI R8
  2. 90:10010000 GHI R0 ; D = 00H
  3. a7:10100111 PLO R7 ; destination address begins at page
  4. a8:10101000 PLO R8 ; lenght in pages
  5. b1:10110001 PHI R1 ; high byte subroutine
  6. a a2:10100010 PLO R2 ; stack pointer = 0100H
  7. b f8:11111000 LDI 01H
  8. c 01:00000001
  9. d b2:10110010 PHI R2
  10. e f8:11111000 LDI LOW WRITEBYTE ; low byte subroutine
  11. f 48:01001000
  12. a1:10100001 PLO R1
  13. f8:11111000 LDI 01H ; for the carry
  14. 01:00000001
  15. a4:10100100 PLO R4
  16. 61:01100001 OUT P1 ; deactivate CS to start operation
  17. 00:00000000 BYTE 00H

  1. e1:11100001 SEX R1 ; for immediate OUT in subroutine
  2. f8:11111000 LDI 03H ; EEPROM read command
  3. 03:00000011
  4. d1:11010001 SEP R1 ; CALL WRITEBYTE
  5. a 90:10010000 GHI R0 ; address bit 16 to 23 = 0
  6. b d1:11010001 SEP R1 ; CALL WRITEBYTE, replace by NOP for ; 8 to 512 Kibit EEPROMs
  7. c 90:10010000 GHI R0 ; address bit 8 to 15 = 0
  8. d d1:11010001 SEP R1 ; CALL WRITEBYTE, replace by NOP for
>
>
  1. b7:10110111 PHI R7
  2. b9:10111001 PHI R9 ; start address
  3. f8:11111000 LDI 080H ; set length
  4. 80:10000000
  5. b8:10111000 PHI R8
  6. a 90:10010000 GHI R0 ; D = 00H
  7. b a7:10100111 PLO R7 ; destination address page boundry
  8. c a8:10101000 PLO R8 ; length in pages
  9. d a9:10101001 PLO R9
  10. e b1:10110001 PHI R1 ; high byte subroutine
  11. f a2:10100010 PLO R2 ; stack pointer = 0100H
  12. f8:11111000 LDI 01H
  13. 01:00000001
  14. b2:10110010 PHI R2
  15. a4:10100100 PLO R4 ; for the carry
  16. f8:11111000 LDI LOW WRITEBYTE ; low byte subroutine
  17. 4f:01001111
  18. a1:10100001 PLO R1
  19. 61:01100001 OUT P1 ; deactivate CS to start operation
  20. 00:00000000 BYTE 00H

  1. e1:11100001 SEX R1 ; for immediate OUT in subroutine
  2. a f8:11111000 LDI 03H ; EEPROM read command
  3. b 03:00000011
  4. c d1:11010001 SEP R1 ; CALL WRITEBYTE
  5. d 90:10010000 GHI R0 ; address bit 16 to 23 = 0
  6. e d1:11010001 SEP R1 ; CALL WRITEBYTE, replace by NOP for ; 1 to 512 Kibit EEPROMs
  7. f 90:10010000 GHI R0 ; address bit 8 to 15 = 0
  8. d1:11010001 SEP R1 ; CALL WRITEBYTE, replace by NOP for
  ; 1 to 4 Kibit EEPROMs
Changed:
<
<
  1. e 90:10010000 GHI R0 ; address bit 0 to 7 = 0
  2. f d1:11010001 SEP R1 ; CALL WRITEBYTE

  1. e6:11100110 SEX R6 ; Rx for OUT
  2. 90:10010000 BLOCKLOOP GHI R0 ; D = 0
  3. a5:10100101 PLO R5 ; reset all bits
  4. f8:11111000 LDI 0 - 8 ; counting up 8 times
  5. f8:11111000
  6. a6:10100110 PLO R6 ; bit counter
  7. 84:10000100 RDBITLOOP GLO R4 ; set CARRY
  8. f6:11110110 SHR
  9. 85:10000101 GLO R5
  10. 3d:00111101 BN2 SETBIT ; branch if bit set (EF2 == 0)
  11. a 2e:00101110
  12. b fe:11111110 SHL ; bit not set
  13. c 30:00110000 BR SAVEBIT
  14. d 2f:00101111
  15. e 7e:01111110 SETBIT SHLC
  16. f 62:01100010 SAVEBIT OUT P2 ; CLK for SPI, INC Rx
  17. a5:10100101 PLO R5
  18. 86:10000110 GLO R6
  19. 3a:00111010 BNZ RDBITLOOP
  20. 26:00100110
  21. 85:10000101 GLO R5 ; get byte
  22. 57:01010111 STR R7 ; save byte
  23. 17:00010111 INC R7
  24. 28:00101000 DEC R8
  25. 88:10001000 GLO R8
  26. 3a:00111010 BNZ BLOCKLOOP
  27. a 21:00100001
  28. b e2:11100010 SEX R2 ; one page finished
  29. c 98:10011000 GHI R8
  30. d 52:01010010 STR R2
  31. e 64:01100100 OUT P4 ; show page count on LEDs
  32. f 22:00100010 DEC R2
  33. 3a:00111010 BNZ BLOCKLOOP-1
  34. 20:00100000
  35. 61:01100001 OUT P1 ; deactivate CS to stop operation
  36. e0:11100000 SEX R0
  37. c0:11000000 LBR 08000H ; start loaded program
  38. 80:10000000
  39. 00:00000000

  1. d0:11010000 SEP R0
  2. a5:10100101 WRITEBYTE PLO R5 ; save transmit byte
  3. f8:11111000 LDI 8 ; counter 8 bits
  4. a 08:00001000
  5. b a6:10100110 PLO R6
  6. c 85:10000101 WRBITLOOP GLO R5 ; get the next bit
  7. d fe:11111110 SHL ; next bit is in the carry
  8. e a5:10100101 PLO R5
  9. f c7:11000111 LSNF ; skip if bit is 0
  10. 62:01100010 OUT P2
  11. 01:00000001 BYTE 00000001B ; CLK for SPI with data bit cleared
  12. cf:11001111 LSDF ; skip if bit is 1
  13. 62:01100010 OUT P2
  14. 00:00000000 BYTE 00000000B ; CLK for SPI with data bit set
  15. 26:00100110 DEC R6
  16. 86:10000110 GLO R6
  17. 3a:00111010 BNZ WRBITLOOP
  18. 4c:01001100
  19. 30:00110000 BR WRITEBYTE-1
  20. a 47:01000111
>
>
  1. 90:10010000 GHI R0 ; address bit 0 to 7 = 0
  2. d1:11010001 SEP R1 ; CALL WRITEBYTE
  3. e6:11100110 SEX R6 ; Rx for OUT
  4. 90:10010000 BLOCKLOOP GHI R0 ; D = 0
  5. a5:10100101 PLO R5 ; reset all bits
  6. f8:11111000 LDI 0 - 8 ; counting up 8 times
  7. f8:11111000
  8. a6:10100110 PLO R6 ; bit counter
  9. 84:10000100 RDBITLOOP GLO R4 ; set CARRY
  10. a f6:11110110 SHR
  11. b 85:10000101 GLO R5 ; get bits
  12. c 3d:00111101 BN2 SETBIT ; branch if bit set (EF2 == 0)
  13. d 30:00110000
  14. e fe:11111110 SHL ; bit not set
  15. f 38:00111000 SKP ; BR SAVEBIT
  16. 7e:01111110 SETBIT SHLC ; set bit
  17. 62:01100010 SAVEBIT OUT P2 ; CLK for SPI, INC Rx
  18. a5:10100101 PLO R5 ; save bits
  19. 86:10000110 GLO R6
  20. 3a:00111010 BNZ RDBITLOOP
  21. 29:00101001
  22. 85:10000101 GLO R5 ; get byte
  23. 57:01010111 STR R7 ; save byte
  24. 17:00010111 INC R7
  25. 28:00101000 DEC R8
  26. a 88:10001000 GLO R8
  27. b 3a:00111010 BNZ BLOCKLOOP
  28. c 24:00100100
  29. d e2:11100010 SEX R2 ; one page finished
  30. e 98:10011000 GHI R8
  31. f 52:01010010 STR R2
  32. 64:01100100 OUT P4 ; show left pages on LEDs
  33. 22:00100010 DEC R2
  34. 3a:00111010 BNZ BLOCKLOOP-1
  35. 23:00100011
  36. 61:01100001 OUT P1 ; deactivate CS to stop operation
  37. e0:11100000 SEX R0
  38. 18:00011000 INC R8 ; set R8 to 0001h
  39. 99:10011001 GHI R9 ; store start address
  40. 58:01011000 STR R8
  41. 18:00011000 INC R8
  42. a 89:10001001 GLO R9
  43. b 58:01011000 STR R8
  44. c 30:00110000 BR START
  45. d 00:00000000

  1. e d0:11010000 SEP R0
  2. f a5:10100101 WRITEBYTE PLO R5 ; save transmit byte
  3. f8:11111000 LDI 8 ; counter 8 bits
  4. 08:00001000
  5. a6:10100110 PLO R6
  6. 85:10000101 WRBITLOOP GLO R5 ; get the next bit
  7. fe:11111110 SHL ; next bit is in the carry
  8. a5:10100101 PLO R5
  9. c7:11000111 LSNF ; skip if bit is 0
  10. 62:01100010 OUT P2
  11. 01:00000001 BYTE 00000001B ; CLK for SPI with data bit cleared
  12. cf:11001111 LSDF ; skip if bit is 1
  13. a 62:01100010 OUT P2
  14. b 00:00000000 BYTE 00000000B ; CLK for SPI with data bit set
  15. c 26:00100110 DEC R6
  16. d 86:10000110 GLO R6
  17. e 3a:00111010 BNZ WRBITLOOP
  18. f 53:01010011
  19. 30:00110000 BR WRITEBYTE-1
  20. 4e:01001110
 

END

Line: 490 to 498
 
META FILEATTACHMENT attachment="raspi-eeprom.png" attr="" comment="" date="1548624176" name="raspi-eeprom.png" path="raspi-eeprom.png" size="26456" user="PeterSchmid" version="3"
META FILEATTACHMENT attachment="raspi-zero-eeprom.jpg" attr="" comment="" date="1548625222" name="raspi-zero-eeprom.jpg" path="raspi-zero-eeprom.jpg" size="206454" user="PeterSchmid" version="1"
Added:
>
>
META FILEATTACHMENT attachment="eeprom-bottom-s.jpg" attr="" comment="" date="1549483153" name="eeprom-bottom-s.jpg" path="eeprom-bottom-s.jpg" size="58634" user="PeterSchmid" version="1"
META FILEATTACHMENT attachment="eeprom-mc.jpg" attr="" comment="" date="1549483330" name="eeprom-mc.jpg" path="eeprom-mc.jpg" size="274595" user="PeterSchmid" version="1"
META FILEATTACHMENT attachment="mc-eeprom-u1.png" attr="" comment="" date="1549484119" name="mc-eeprom-u1.png" path="mc-eeprom-u1.png" size="18349" user="PeterSchmid" version="1"

Revision 162019-02-06 - PeterSchmid

Line: 1 to 1
 
META TOPICPARENT name="WebHome"
%DASHBOARD{ section="banner"
Line: 103 to 103
  PLO R6 SEX R0 BITLOOP:
Deleted:
<
<		 OUT4,0b01000000 ; CLK for SPI OUT4,0b00000000
  INC R6 GHI R6 ; set CARRY SHRC GLO R5 B4 SETBIT ; branch if bit set SHL ; bit not set
Changed:
<
<		 BR SAVEBIT
>
>		 SKP
 SETBIT: SHLC SAVEBIT: PLO R5
Added:
>
>		 OUT4 BYTE 0b01000000 ; CLK for SPI OUT4 BYTE 0b00000000
  GLO R6 BNZ BITLOOP
Line: 135 to 137
  SHLC , next bit is in the carry PLO R5 BDF SETBIT
Changed:
<
<		 OUT4,0b01000000 ; CLK for SPI with data bit cleared OUT4,0b00000000
>
>		 OUT P4 BYTE 0b01000000 ; CLK for SPI with data bit cleared OUT P4 BYTE 0b00000000
  BR NEXT SETBIT:
Changed:
<
<		 OUT4,0b11000000 ; CLK for SPI with data bit set OUT4,0b10000000
>
>		 OUT P4 BYTE 0b11000000 ; CLK for SPI with data bit set OUT P4 BYTE 0b10000000
 NEXT: DEC R6 GLO R6

Revision 152019-02-06 - PeterSchmid

Line: 1 to 1
 
META TOPICPARENT name="WebHome"
%DASHBOARD{ section="banner"
Line: 168 to 168
 

Read Byte
Added:
>
>		 LDI 01 PLO R4 ; for the carry
  GHI R0 ; D = 0 PLO R5 ; reset all bits LDI 0 - 8 ; counting up 8 times
Line: 177 to 179
  GLO R5 BN2 SETBIT ; branch if bit set (EF2 == 0) SHL ; bit not set
Changed:
<
<		 BR SAVEBIT
>
>		 SKP ; BR SAVEBIT
 SETBIT SHLC SAVEBIT OUT P2 ; CLK for SPI, INC Rx PLO R5

Revision 142019-02-05 - PeterSchmid

Line: 1 to 1
 
META TOPICPARENT name="WebHome"
%DASHBOARD{ section="banner"
Line: 168 to 168
 

Read Byte
Changed:
<
<		 ; MSB first

LDI 0 PLO R5 LDI 0xFF PHI R6 LDI 0xFF - 8 PLO R6 SEX R6 BITLOOP: OUT2 ; CLK for SPI, INC Rx GHI R6 ; set CARRY SHRC

>
>		 GHI R0 ; D = 0 PLO R5 ; reset all bits LDI 0 - 8 ; counting up 8 times PLO R6 ; bit counter RDBITLOOP GLO R4 ; set CARRY SHR
  GLO R5
Changed:
<
<		 B2 SETBIT ; branch if bit set
>
>		 BN2 SETBIT ; branch if bit set (EF2 == 0)
  SHL ; bit not set BR SAVEBIT
Changed:
<
<		SETBIT: SHLC SAVEBIT:
>
>		SETBIT SHLC SAVEBIT OUT P2 ; CLK for SPI, INC Rx
  PLO R5 GLO R6
Changed:
<
<		 BNZ BITLOOP
>
>		 BNZ RDBITLOOP
 

about 200 cycles for one byte -> 1 ms -> 1 KiB takes about 1 s

Line: 198 to 190
 

Write Byte
Changed:
<
<		WRITEBYTE: LDI 0 PHI R6 LDI 8
>
>		WRITEBYTE PLO R5 ; save transmit byte LDI 8 ; counter 8 bits
  PLO R6
Changed:
<
<		 SEX R0 BITLOOP: GLO R5 ; get the next bit SHLC , next bit is in the carry
>
>		WRBITLOOP GLO R5 ; get the next bit SHL ; next bit is in the carry
  PLO R5
Changed:
<
<		 LSNF OUT2,0b00000000 ; CLK for SPI with data bit cleared LSDF OUT2,0b00000001 ; CLK for SPI with data bit set
>
>		 LSNF ; skip if bit is 0 OUT P2 BYTE 00000001B ; CLK for SPI with data bit cleared LSDF ; skip if bit is 1 OUT P2 BYTE 00000000B ; CLK for SPI with data bit set
  DEC R6 GLO R6
Changed:
<
<		 BNZ BITLOOP
>
>		 BNZ WRBITLOOP
 

Line: 311 to 301
 
Mini Boot Loader

Mini Boot Loader
Changed:
<
<		 ; MSB first

LDI xyz ; EEPROM read command PLO R9 LDI 0 PLO R7 ; set page pointer PHI R8 ; set EEPROM address PLO R8 LDI 0x80 PHI R7 ; set block pointer BLOCKLOOP:

GLO R9 ; write read command to the EEPROM PLO R5 CALL WRITEBYTE LDI 0 ; address bit 17 to 24 PLO R5 CALL WRITEBYTE GHI R8 ; address bit 8 to 16 PLO R5 CALL WRITEBYTE GLO R8 ; address bit 8 to 16 PLO R5

PAGELOOP: LDI 0 ; init read byte PLO R5 LDI 0xFF ; for the carry bits PHI R6 LDI 0xFF - 8 ; counting up 8 times PLO R6 ; bit counter SEX R6 ; dummy Rx for OUT RDBITLOOP: OUT2 ; CLK for SPI, INC Rx GHI R6 ; set CARRY SHRC GLO R5 B2 SETBIT ; branch if bit set SHL ; bit not set BR SAVEBIT SETBIT: SHLC SAVEBIT: PLO R5 GLO R6 BNZ BITLOOP GLO R5 ; get byte

>
>		 ; TITL "EEPROM Boot Loader for Elf Memebership Card" ; EJCT 60
 
Added:
>
>		 CPU 1802
 
Changed:
<
<		WRITEBYTE: LDI 0 PHI R6 LDI 8 PLO R6 SEX R0 WRBITLOOP: GLO R5 ; get the next bit SHLC , next bit is in the carry PLO R5 LSNF OUT2,0b00000000 ; CLK for SPI with data bit cleared LSDF OUT2,0b00000001 ; CLK for SPI with data bit set DEC R6 GLO R6 BNZ BITLOOP
>
>		 NUMBER EQU 0
 
Added:
>
>		 ; ; Register Definitions: ; R0 EQU 0 R1 EQU 1 R2 EQU 2 R3 EQU 3 R4 EQU 4 R5 EQU 5 R6 EQU 6 R7 EQU 7 R8 EQU 8 R9 EQU 9 R10 EQU 10 R11 EQU 11 R12 EQU 12 R13 EQU 13 R14 EQU 14 R15 EQU 15

; ; I/O Port Definitions: ; P1 EQU 1 P2 EQU 2 P3 EQU 3 P4 EQU 4 P5 EQU 5 P6 EQU 6 P7 EQU 7

ORG 0H

; R0 program counter ; R1 subroutine pc ; R2 stack pointer ; R5.0 byte (read/write) ; R6.0 bit counter ; R4.0 carry bits ; R7 destination address ; R8 length

BOOTLOADER

  1. f8:11111000 LDI 080H ; set destination address
  2. 80:10000000
  3. b7:10110111 PHI R7
  4. f8:11111000 LDI 080H ; set length
  5. 80:10000000
  6. b8:10111000 PHI R8
  7. 90:10010000 GHI R0 ; D = 00H
  8. a7:10100111 PLO R7 ; destination address begins at page
  9. a8:10101000 PLO R8 ; lenght in pages
  10. b1:10110001 PHI R1 ; high byte subroutine
  11. a a2:10100010 PLO R2 ; stack pointer = 0100H
  12. b f8:11111000 LDI 01H
  13. c 01:00000001
  14. d b2:10110010 PHI R2
  15. e f8:11111000 LDI LOW WRITEBYTE ; low byte subroutine
  16. f 48:01001000
  17. a1:10100001 PLO R1
  18. f8:11111000 LDI 01H ; for the carry
  19. 01:00000001
  20. a4:10100100 PLO R4
  21. 61:01100001 OUT P1 ; deactivate CS to start operation
  22. 00:00000000 BYTE 00H

  1. e1:11100001 SEX R1 ; for immediate OUT in subroutine
  2. f8:11111000 LDI 03H ; EEPROM read command
  3. 03:00000011
  4. d1:11010001 SEP R1 ; CALL WRITEBYTE
  5. a 90:10010000 GHI R0 ; address bit 16 to 23 = 0
  6. b d1:11010001 SEP R1 ; CALL WRITEBYTE, replace by NOP for ; 8 to 512 Kibit EEPROMs
  7. c 90:10010000 GHI R0 ; address bit 8 to 15 = 0
  8. d d1:11010001 SEP R1 ; CALL WRITEBYTE, replace by NOP for ; 1 to 4 Kibit EEPROMs
  9. e 90:10010000 GHI R0 ; address bit 0 to 7 = 0
  10. f d1:11010001 SEP R1 ; CALL WRITEBYTE

  1. e6:11100110 SEX R6 ; Rx for OUT
  2. 90:10010000 BLOCKLOOP GHI R0 ; D = 0
  3. a5:10100101 PLO R5 ; reset all bits
  4. f8:11111000 LDI 0 - 8 ; counting up 8 times
  5. f8:11111000
  6. a6:10100110 PLO R6 ; bit counter
  7. 84:10000100 RDBITLOOP GLO R4 ; set CARRY
  8. f6:11110110 SHR
  9. 85:10000101 GLO R5
  10. 3d:00111101 BN2 SETBIT ; branch if bit set (EF2 == 0)
  11. a 2e:00101110
  12. b fe:11111110 SHL ; bit not set
  13. c 30:00110000 BR SAVEBIT
  14. d 2f:00101111
  15. e 7e:01111110 SETBIT SHLC
  16. f 62:01100010 SAVEBIT OUT P2 ; CLK for SPI, INC Rx
  17. a5:10100101 PLO R5
  18. 86:10000110 GLO R6
  19. 3a:00111010 BNZ RDBITLOOP
  20. 26:00100110
  21. 85:10000101 GLO R5 ; get byte
  22. 57:01010111 STR R7 ; save byte
  23. 17:00010111 INC R7
  24. 28:00101000 DEC R8
  25. 88:10001000 GLO R8
  26. 3a:00111010 BNZ BLOCKLOOP
  27. a 21:00100001
  28. b e2:11100010 SEX R2 ; one page finished
  29. c 98:10011000 GHI R8
  30. d 52:01010010 STR R2
  31. e 64:01100100 OUT P4 ; show page count on LEDs
  32. f 22:00100010 DEC R2
  33. 3a:00111010 BNZ BLOCKLOOP-1
  34. 20:00100000
  35. 61:01100001 OUT P1 ; deactivate CS to stop operation
  36. e0:11100000 SEX R0
  37. c0:11000000 LBR 08000H ; start loaded program
  38. 80:10000000
  39. 00:00000000

  1. d0:11010000 SEP R0
  2. a5:10100101 WRITEBYTE PLO R5 ; save transmit byte
  3. f8:11111000 LDI 8 ; counter 8 bits
  4. a 08:00001000
  5. b a6:10100110 PLO R6
  6. c 85:10000101 WRBITLOOP GLO R5 ; get the next bit
  7. d fe:11111110 SHL ; next bit is in the carry
  8. e a5:10100101 PLO R5
  9. f c7:11000111 LSNF ; skip if bit is 0
  10. 62:01100010 OUT P2
  11. 01:00000001 BYTE 00000001B ; CLK for SPI with data bit cleared
  12. cf:11001111 LSDF ; skip if bit is 1
  13. 62:01100010 OUT P2
  14. 00:00000000 BYTE 00000000B ; CLK for SPI with data bit set
  15. 26:00100110 DEC R6
  16. 86:10000110 GLO R6
  17. 3a:00111010 BNZ WRBITLOOP
  18. 4c:01001100
  19. 30:00110000 BR WRITEBYTE-1
  20. a 47:01000111
 
Added:
>
>		 END
 

Revision 132019-02-02 - PeterSchmid

Line: 1 to 1
 
META TOPICPARENT name="WebHome"
%DASHBOARD{ section="banner"
Line: 150 to 150
 
EEPROM patched on MC PCB

EEPROM patched on MC PCB

Changed:
<
<		SPI Mode 0, data is always latched in on the rising edge of SCK and always output on the falling edge of SCK. For CS one output port bis is needed e.g. O7 or N2 (INP4) to start/end operation (A high-to-low transition on the CS pin is required to start an operation and a low-to-high transition is required to end an operation).
>
>		SPI Mode 0, data is always latched in on the rising edge of SCK and always output on the falling edge of SCK. For CS one output port bis is needed e.g. O7 or N0 (INP1) to start/end operation (A high-to-low transition on the CS pin is required to start an operation and a low-to-high transition is required to end an operation).
 
SPI MC (Master) 25LCxxxx (Slave) Interface
MISO EF2 2 SO direct
MOSI D0 5 SI direct
CLK TPB & N1 (OUT2) 6 SCK wired AND; Pullup 10 k, 2 1N4148
Changed:
<
<
CS N2 1 CS direct
>
>
CS N0 1 CS direct
 
    8 VCC +5V
    3 WP +5V
  J2.14 WAIT 7 HOLD direct

Revision 122019-02-01 - PeterSchmid

Line: 1 to 1
 
META TOPICPARENT name="WebHome"
%DASHBOARD{ section="banner"
Line: 307 to 307
 

Added:
>
>
Mini Boot Loader

Mini Boot Loader 

        ; MSB first

        LDI     xyz          ; EEPROM read command
        PLO     R9
        LDI     0
        PLO     R7           ; set page pointer
        PHI     R8           ; set EEPROM address
        PLO     R8 
        LDI     0x80
        PHI     R7           ; set block pointer
BLOCKLOOP:

        GLO     R9           ; write read command to the EEPROM
        PLO     R5
        CALL    WRITEBYTE
        LDI     0            ; address bit 17 to 24
        PLO     R5
        CALL    WRITEBYTE
        GHI     R8           ; address bit 8 to 16
        PLO     R5
        CALL    WRITEBYTE
        GLO     R8           ; address bit 8 to 16
        PLO     R5

PAGELOOP:
        LDI     0            ; init read byte
        PLO     R5 
        LDI     0xFF         ; for the carry bits
        PHI     R6          
        LDI     0xFF - 8     ; counting up 8 times
        PLO     R6           ; bit counter
        SEX     R6           ; dummy Rx for OUT
RDBITLOOP:
        OUT2                 ; CLK for SPI, INC Rx
        GHI     R6           ; set CARRY
        SHRC
        GLO     R5
        B2      SETBIT       ; branch if bit set
        SHL                  ; bit not set
        BR      SAVEBIT      
SETBIT:
        SHLC
SAVEBIT:
        PLO     R5
        GLO     R6
        BNZ     BITLOOP
        GLO     R5           ; get byte


WRITEBYTE:
        LDI     0            
        PHI     R6
        LDI     8
        PLO     R6
        SEX     R0
WRBITLOOP:
        GLO     R5           ; get the next bit
        SHLC                 , next bit is in the carry
        PLO     R5
        LSNF
        OUT2,0b00000000      ; CLK for SPI with data bit cleared
        LSDF
        OUT2,0b00000001      ; CLK for SPI with data bit set 
        DEC     R6
        GLO     R6
        BNZ     BITLOOP

 
Kermit/ZModem

Kermit/ZModem

What about using KERMIT or ZMODEM protocol for the file transfer and use

Revision 112019-01-29 - PeterSchmid

Line: 1 to 1
 
META TOPICPARENT name="WebHome"
%DASHBOARD{ section="banner"
Line: 320 to 320
 
Added:
>
>
 

Revision 102019-01-28 - PeterSchmid

Line: 1 to 1
 
META TOPICPARENT name="WebHome"
%DASHBOARD{ section="banner"
Line: 268 to 268
 
-e hexadr
end adress in hex (0x1FFFF is default)
Changed:
<
<

How to get and build the RaspiElf tools

>
>

How to get and build the EEPROM tools

  Get the source from the GIT repository (if you have not installed GIT yet, then install it with sudo apt-get install git), type only the bold text after the $ sign:
Line: 281 to 281
 Build (compile) from the sources: 
pi@cosmac:~/elf $ cd RaspiElf
Changed:
<
<		pi@cosmac:~/elf/RaspiElf $ cd eeprom/
>
>		pi@cosmac:~/elf/RaspiElf $ cd eeprom
 pi@cosmac:~/elf/RaspiElf/eeprom $ make cc -g -c eeprom2bin.c cc -g -o eeprom2bin -lwiringPi eeprom2bin.o

Revision 92019-01-28 - PeterSchmid

Line: 1 to 1
 
META TOPICPARENT name="WebHome"
%DASHBOARD{ section="banner"
Line: 318 to 318
 https://github.com/utoh/pygmy-forth/blob/master/extras/kermit/pfkerm.doc

Added:
>
>
 

Revision 82019-01-28 - PeterSchmid

Line: 1 to 1
 
META TOPICPARENT name="WebHome"
%DASHBOARD{ section="banner"
Line: 15 to 15
 
SPI EEPROMs

SPI EEPROMs

Changed:
<
<		The Serial Peripheral Interface SPI or four-wire serial bus is easy to use. The CDP1802 (MC) is the SPI master, the EEPROM is the slave. There are many different EEPROM types and sizes available e.g. AT25M02 (2Mbit, 256 KiB, $3), 25LC1024 (128 KiB, $2), or 25LC512 (64 KiB, $1.50). All available in DIL8 packages. 64/128/256 KiB seems very small for today's standards where storage is quantified in GiB, but I think it's more than enough for a small Forth system, the size is similar to early floppy disks. If you want more memory there is 16 MiB serial EEPROM W25Q128J from WINBOND, please note that is a 3.3 V device!
>
>		The Serial Peripheral Interface SPI or four-wire serial bus is easy to use. The CDP1802 (MC) is the SPI master, the EEPROM is the slave. There are many different EEPROM types and sizes available e.g. AT25M02 (2Mbit, 256 KiB, $3), 25LC1024 (128 KiB, $2), or 25LC512 (64 KiB, $1.50). All available in DIL8 packages. 64/128/256 KiB seems very small for today's standards where storage is quantified in GiB, but I think it's more than enough for a small Forth system, the size is similar to early floppy disks. If you want more memory there are 16 MiB serial Flash chips e.g. from WINBOND W25Q128J or IS25LP128F, please note they are 3.3 V devices and in SMT!
 
CLK   MC ->- host
MOSI  MC ->- host

Revision 72019-01-27 - PeterSchmid

Line: 1 to 1
 
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Line: 182 to 182
  SHRC GLO R5 B2 SETBIT ; branch if bit set
Changed:
<
<		 SHR ; bit not set
>
>		 SHL ; bit not set
  BR SAVEBIT SETBIT:
Changed:
<
<		 SHRC
>
>		 SHLC
 SAVEBIT: PLO R5 GLO R6
Line: 239 to 239
 
SPI1 CS1 17 WAIT
Changed:
<
<
raspi-eeprom.png
Enlarge
Schematic
>
>
raspi-eeprom.png
Enlarge
Schematic
raspi-zero-eeprom.jpg
Enlarge
Raspberry Pi Zero and EEPROM interface
 
Deleted:
<
<		Because of: "A high-to-low transition on the CS pin is required to start an operation and a low-to-high transition is required to end an operation." That means the CS has to be active as long as a read or write process is going on. Therefore the SPI0 CSx can't be used.
 

eeprom2bin (download tool)

Line: 268 to 268
 
-e hexadr
end adress in hex (0x1FFFF is default)
Added:
>
>

How to get and build the RaspiElf tools

Get the source from the GIT repository (if you have not installed GIT yet, then install it with sudo apt-get install git), type only the bold text after the $ sign: 

pi@cosmac:~/elf $ git clone https://github.com/spyren/RaspiElf
Cloning into 'RaspiElf'...
pi@cosmac:~/elf $

Build (compile) from the sources: 

pi@cosmac:~/elf $ cd RaspiElf
pi@cosmac:~/elf/RaspiElf $ cd eeprom/
pi@cosmac:~/elf/RaspiElf/eeprom $ make
cc -g -c eeprom2bin.c
cc -g -o eeprom2bin -lwiringPi eeprom2bin.o
cc -g -c bin2eeprom.c
cc -g -o bin2eeprom -lwiringPi bin2eeprom.o
pi@cosmac:~/elf/RaspiElf/eeprom $

Install the binaries into /usr/local/bin 

pi@cosmac:~/elf/RaspiElf/eeprom $ sudo make install
install -m 557 eeprom2bin bin2eeprom /usr/local/bin

Install wiringPi (GPIO Interface library for the Raspberry Pi), details see http://wiringpi.com/download-and-install/

Enable the SPI interface 

@cosmac:~/elf/RaspiElf/eeprom $ sudo raspi-config
  • 5 Interfacing Options Configure connections to peripherals
  • P4 SPI Enable/Disable automatic loading of SPI kernel module
 
Kermit/ZModem

Kermit/ZModem

Line: 290 to 328
  
<--/commentPlugin-->
Changed:
<
<
META FILEATTACHMENT attachment="raspi-eeprom.png" attr="" comment="" date="1548535017" name="raspi-eeprom.png" path="raspi-eeprom.png" size="25608" user="PeterSchmid" version="2"
>
>
META FILEATTACHMENT attachment="raspi-eeprom.png" attr="" comment="" date="1548624176" name="raspi-eeprom.png" path="raspi-eeprom.png" size="26456" user="PeterSchmid" version="3"
META FILEATTACHMENT attachment="raspi-zero-eeprom.jpg" attr="" comment="" date="1548625222" name="raspi-zero-eeprom.jpg" path="raspi-zero-eeprom.jpg" size="206454" user="PeterSchmid" version="1"

Revision 62019-01-27 - PeterSchmid

Line: 1 to 1
 
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%DASHBOARD{ section="banner"
Line: 217 to 217
 

Changed:
<
<
SEEPROM Connected to Raspberry Pi
>
>
EEPROM Connected to Raspberry Pi
 

EEPROM Connected to Raspberry Pi

Revision 52019-01-26 - PeterSchmid

Line: 1 to 1
 
META TOPICPARENT name="WebHome"
%DASHBOARD{ section="banner"
Line: 60 to 60
 
LPWP 0000 1000 Low Power Write Poll

Changed:
<
<
Serial EEPROM Connected to MC's Centronics Connector (Switches and LEDs)

Serial EEPROM Connected to MC's Centronics Connector (Switches and LEDs)

>
>
EEPROM Connected to MC's Centronics Connector (Switches and LEDs)

EEPROM Connected to MC's Centronics Connector (Switches and LEDs)

  Sharing the LED and Switch port, you loose three LEDs and one switch or IN. Possible conflict with the bootstrap loader, if there is a read sequence (CS and read pattern 0000 0011). To prevent this, set the EEPROM into HOLD state e.g. with the WAIT signal.
Line: 147 to 147
  BNZ BITLOOP
Changed:
<
<
Serial EEPROM patched on MC PCB

Serial EEPROM patched on MC PCB

>
>
EEPROM patched on MC PCB

EEPROM patched on MC PCB

  SPI Mode 0, data is always latched in on the rising edge of SCK and always output on the falling edge of SCK. For CS one output port bis is needed e.g. O7 or N2 (INP4) to start/end operation (A high-to-low transition on the CS pin is required to start an operation and a low-to-high transition is required to end an operation).
Line: 217 to 217
 

Changed:
<
<
Serial EEPROM connected to Raspberry Pi

Serial EEPROM connected to Raspberry Pi

>
>
SEEPROM Connected to Raspberry Pi

EEPROM Connected to Raspberry Pi

 

Revision 42019-01-26 - PeterSchmid

Line: 1 to 1
 
META TOPICPARENT name="WebHome"
%DASHBOARD{ section="banner"
Line: 15 to 15
 
SPI EEPROMs

SPI EEPROMs

Changed:
<
<		The Serial Peripheral Interface SPI or four-wire serial bus is easy to use. The CDP1802 (MC) is the SPI master, the EEPROM is the slave. There are many different EEPROM types and sizes available e.g. AT25M02 (2Mbit, 256 KiB, $3), 25LC1024 (128 KiB, $2), or 25LC512 (64 KiB, $1.50). All available in DIL8 packages. 64/128/256 KiB seems very small for today's standards where storage is quantified in GiB, but I think it's more than enough for a small Forth system, the size is similar to early floppy disks. If you want more memory there is 16 MiB serial EEPROM W25Q128J from WINBOND, please note that is a 3.3 V device!
>
>		The Serial Peripheral Interface SPI or four-wire serial bus is easy to use. The CDP1802 (MC) is the SPI master, the EEPROM is the slave. There are many different EEPROM types and sizes available e.g. AT25M02 (2Mbit, 256 KiB, $3), 25LC1024 (128 KiB, $2), or 25LC512 (64 KiB, $1.50). All available in DIL8 packages. 64/128/256 KiB seems very small for today's standards where storage is quantified in GiB, but I think it's more than enough for a small Forth system, the size is similar to early floppy disks. If you want more memory there is 16 MiB serial EEPROM W25Q128J from WINBOND, please note that is a 3.3 V device!
 
CLK   MC ->- host
MOSI  MC ->- host
Line: 33 to 33
 While in Hold mode, the SO pin will be in a high impedance state. In addition, both the SI pin and the SCK pin will be ignored.
Added:
>
>		From 1024 Kibit up there are 24 address bits, 8 Kibit to 512 Kibit have 16 address bits. 1, 2, and 4 Kibit have 8 bit address bits.
 25LCxxxx Instruction Set
Name Format Description
READ 0000 0011 Read data from memory array beginning at selected address
Line: 218 to 220
 
Serial EEPROM connected to Raspberry Pi

Serial EEPROM connected to Raspberry Pi

Changed:
<
<		http://www.netzmafia.de/skripten/hardware/RasPi/RasPi_SPI.html
>
>
 

SPI Function BCM/GPIO RaspiElf
Changed:
<
<
SPI0 MISO 9 IN4
SPI0 MOSI 10 IN3
SPI0 SCLK 11 IN6
>
>
SPI0 MISO 9 IN4
SPI0 MOSI 10 IN3
SPI0 SCLK 11 IN6
 
SPI0 CS0 8 IN7
Changed:
<
<
SPI0 CS1 7 O0
>
>
SPI0 CS1 7 O0
EEPROM CS 5 O1
 
SPI1 MISO 19 O5
SPI1 MOSI 20 -
SPI1 SCLK 21 shutdown
Line: 234 to 239
 
SPI1 CS1 17 WAIT
Changed:
<
<
mc-eeprom-u1.png
Enlarge
Schematic
>
>
raspi-eeprom.png
Enlarge
Schematic
 
Changed:
<
<

Read Byte

>
>		Because of: "A high-to-low transition on the CS pin is required to start an operation and a low-to-high transition is required to end an operation." That means the CS has to be active as long as a read or write process is going on. Therefore the SPI0 CSx can't be used.

eeprom2bin (download tool)

NAME
eeprom2bin - Copies the EEPROM memory to a binary file on the Raspberry Pi.

SYNOPSIS
eeprom2bin [-s hexadr] [-e hexadr] [file]

DESCRIPTION
Copies the EEPROM memory to a binary file (or stdout) on the Raspberry Pi. The Raspberry Pi GPIO SPI0.1 is used as interface to the SPI EEPROM (24 bit address, at least a 1024 Kibit type, 256 byte page). The generated data is written to the standard output stream or to a file. Caution: Overwrite file if it exists. Use > for redirecting (save the file) or | for piping to another command (e.g. hexdump).

OPTIONS
Non argument options that are duplicated on the command line are not harmful. For options that require an argument, each duplication will override the previous argument value.
-s hexadr
start address in hex (0 is default)
-e hexadr
end adress in hex (0x1FFFF is default)

bin2eeprom (upload tool)

NAME
bin2eeprom - Copies the content of binary file on the Raspberry Pi to EEPROM.

SYNOPSIS
bin2eeprom [-s hexadr] [-e hexadr] [file]

DESCRIPTION
Copies the content of binary file on the Raspberry Pi to EEPROM memory. The Raspberry Pi GPIO SPI0.1 is used as interface to the SPI EEPROM (24 bit address, at least a 1024 Kibit type, 256 byte page). Use < for redirecting or | for piping from another command.

OPTIONS
Non argument options that are duplicated on the command line are not harmful. For options that require an argument, each duplication will override the previous argument value.
-s hexadr
start address in hex (0 is default)
-e hexadr
end adress in hex (0x1FFFF is default)
 
Deleted:
<
<

Write Byte

 
Kermit/ZModem
Line: 261 to 289
 

Comments 

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META FILEATTACHMENT attachment="raspi-eeprom.png" attr="" comment="" date="1548535017" name="raspi-eeprom.png" path="raspi-eeprom.png" size="25608" user="PeterSchmid" version="2"

Revision 32019-01-26 - PeterSchmid

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SPI0 MISO 9 IN4
SPI0 MOSI 10 IN3
SPI0 SCLK 11 IN6
Changed:
<
<
SPI0 CS0) 8 IN7
SPI0 CS1) 7 O0
>
>
SPI0 CS0 8 IN7
SPI0 CS1 7 O0
 
SPI1 MISO 19 O5
SPI1 MOSI 20 -
SPI1 SCLK 21 shutdown

Revision 22019-01-26 - PeterSchmid

Line: 1 to 1
 
META TOPICPARENT name="WebHome"
%DASHBOARD{ section="banner" image="/twiki/pub/Cosmac/RaspiElf/raspi-elfmemcard-s.jpg"
Changed:
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<		 title="A Serial EEPROM as Mass Storage"
>
>		 title="Serial EEPROMs as Mass Storage"
  titlestyle="color:#F00000;" }%
Intro
Changed:
<
<		Forth without mass storage (blocks, screens) is a not complete. A SD-Card interface could be a reasonable solution but it is an overkill for a small Forth system. Small serial EEPROMs are for my opinion more suitable.
>
>		Forth without mass storage (blocks, screens) is a not complete. A SD-Card interface could be a reasonable solution but it is an overkill for a small Forth system. Small serial EEPROMs are for my opinion more suitable.
 
Contents
Changed:
<
<
EEPROM Serial Communication
>
>
SPI EEPROMs
 

SPI EEPROMs

Changed:
<
<		Serial Peripheral Interface SPI, MC is the SPI master, the host is the slave. e.g. AT25M02 SPI EEPROM 2Mbit (256 KiB, $3), 25LC1024 (128 KiB, $2), or 25LC512 (64 KiB, $1.50). DIL8 Package. 64/128/256 KiB seems very small for today's standards where storage is quantified in GiB, but I think it's more than enough for a small Forth system. If you want more memory there is 16 MiB serial EEPROM W25Q128J from WINBOND, please note that is a 3.3 V part!
>
>		The Serial Peripheral Interface SPI or four-wire serial bus is easy to use. The CDP1802 (MC) is the SPI master, the EEPROM is the slave. There are many different EEPROM types and sizes available e.g. AT25M02 (2Mbit, 256 KiB, $3), 25LC1024 (128 KiB, $2), or 25LC512 (64 KiB, $1.50). All available in DIL8 packages. 64/128/256 KiB seems very small for today's standards where storage is quantified in GiB, but I think it's more than enough for a small Forth system, the size is similar to early floppy disks. If you want more memory there is 16 MiB serial EEPROM W25Q128J from WINBOND, please note that is a 3.3 V device!
 
CLK   MC ->- host
MOSI  MC ->- host
Line: 62 to 61
 
Serial EEPROM Connected to MC's Centronics Connector (Switches and LEDs)

Serial EEPROM Connected to MC's Centronics Connector (Switches and LEDs)

Changed:
<
<		Sharing the LED and Switch port, you loose two LEDs and one switch. Possible conflict with the bootstrap loader, if there is a read sequence (CS and read pattern 0000 0011). To prevent this, set the EEPROM into HOLD state e.g. with the WAIT signal.
>
>		Sharing the LED and Switch port, you loose three LEDs and one switch or IN. Possible conflict with the bootstrap loader, if there is a read sequence (CS and read pattern 0000 0011). To prevent this, set the EEPROM into HOLD state e.g. with the WAIT signal.
 
SPI MC (Master) 25LCxxxx (Slave) Interface
MISO J2.1 IN EF4 2 SO diode e.g. 1N4148
Line: 77 to 76
 
mc-eeprom-conn.png
Enlarge
Schematic
Changed:
<
<		Raspberry Pi can emulate SPI EEPROM. On RaspiElf the switches/LEDs are already connected to Raspi's GPIOs. No need for additional hardware. But I have to write an SPI server for the Raspberry Pi.

Raspi's SPI interfaces can't be used because of conflicting port usage.

  • BCM 19 (SPI1 MISO) O5
  • BCM 20 (SPI1 MOSI) -
  • BCM 21 (SPI1 SCLK) shutdown
  • BCM 18 (SPI1 CS0) CLR
  • BCM 17 (SPI1 CS1) WAIT

  • BCM 9 (SPI0 MISO) IN4
  • BCM 10 (SPI0 MOSI) IN3
  • BCM 11 (SPI0 SCLK) IN6
  • BCM 8 (SPI0 CS0) IN7
  • BCM 7 (SPI0 CS1) O0

http://www.netzmafia.de/skripten/hardware/RasPi/RasPi_SPI.html

>
>		Raspberry Pi can emulate SPI EEPROM. On RaspiElf the switches/LEDs are already connected to Raspi's GPIOs. No need for additional hardware. But I have to write an SPI server for the Raspberry Pi. Raspi's SPI interfaces can't be used because of conflicting port usage.
 

Read Byte

Line: 231 to 215
 

Added:
>
>
Serial EEPROM connected to Raspberry Pi

Serial EEPROM connected to Raspberry Pi

http://www.netzmafia.de/skripten/hardware/RasPi/RasPi_SPI.html

SPI Function BCM/GPIO RaspiElf
SPI0 MISO 9 IN4
SPI0 MOSI 10 IN3
SPI0 SCLK 11 IN6
SPI0 CS0) 8 IN7
SPI0 CS1) 7 O0
SPI1 MISO 19 O5
SPI1 MOSI 20 -
SPI1 SCLK 21 shutdown
SPI1 CS0 18 CLR
SPI1 CS1 17 WAIT

mc-eeprom-u1.png
Enlarge
Schematic

Read Byte

Write Byte

 
Kermit/ZModem

Kermit/ZModem

What about using KERMIT or ZMODEM protocol for the file transfer and use

Revision 12019-01-24 - PeterSchmid

Line: 1 to 1
Added:
>
>
META TOPICPARENT name="WebHome"
A Serial EEPROM as Mass Storage
Intro
Forth without mass storage (blocks, screens) is a not complete. A SD-Card interface could be a reasonable solution but it is an overkill for a small Forth system. Small serial EEPROMs are for my opinion more suitable.
Contents
EEPROM Serial Communication

SPI EEPROMs

Serial Peripheral Interface SPI, MC is the SPI master, the host is the slave. e.g. AT25M02 SPI EEPROM 2Mbit (256 KiB, $3), 25LC1024 (128 KiB, $2), or 25LC512 (64 KiB, $1.50). DIL8 Package. 64/128/256 KiB seems very small for today's standards where storage is quantified in GiB, but I think it's more than enough for a small Forth system. If you want more memory there is 16 MiB serial EEPROM W25Q128J from WINBOND, please note that is a 3.3 V part! 

CLK   MC ->- host
MOSI  MC ->- host
MISO  MC -<- host
SS    MC ->- host or other peripherals (optional)

A high-to-low transition on the CS pin is required to start an operation and a low-to-high transition is required to end an operation.

Invalid Opcode: If an invalid opcode is received, no data will be shifted into AT25M02 and the Serial Data Output (SO) pin will remain in a high impedance state until the falling edge of CS is detected again. This will reinitialize the serial communication.

While in Hold mode, the SO pin will be in a high impedance state. In addition, both the SI pin and the SCK pin will be ignored.

25LCxxxx Instruction Set

Name Format Description
READ 0000 0011 Read data from memory array beginning at selected address
WRITE 0000 0010 Write data to memory array beginning at selected address
WREN 0000 0110 Set the write enable latch (enable write operations)
WRDI 0000 0100 Reset the write enable latch (disable write operations)
RDSR 0000 0101 Read STATUS register
WRSR 0000 0001 Write STATUS register
PE 0100 0010 Page Erase – erase one page in memory array
SE 1101 1000 Sector Erase – erase one sector in memory array
CE 1100 0111 Chip Erase – erase all sectors in memory array
RDID 1010 1011 Release from Deep power-down and read electronic signature
DPD 1011 1001 Deep Power-Dow

AT25M02 Instruction Set

Name Format Description
READ 0000 0011 Read from Memory Array
WRITE 0000 0010 Write to Memory Array
WREN 0000 0110 Set Write Enable Latch (WEL)
WRDI 0000 0100 Reset Write Enable Latch (WEL)
RDSR 0000 0101 Read Status Register (SR)
WRSR 0000 0001 Write Status Register (SR)
LPWP 0000 1000 Low Power Write Poll

Serial EEPROM Connected to MC's Centronics Connector (Switches and LEDs)

Serial EEPROM Connected to MC's Centronics Connector (Switches and LEDs)

Sharing the LED and Switch port, you loose two LEDs and one switch. Possible conflict with the bootstrap loader, if there is a read sequence (CS and read pattern 0000 0011). To prevent this, set the EEPROM into HOLD state e.g. with the WAIT signal.

SPI MC (Master) 25LCxxxx (Slave) Interface
MISO J2.1 IN EF4 2 SO diode e.g. 1N4148
MOSI J2.11 O7 LED7 5 SI direct
CLK J2.10 O6 LED6 6 SCK direct
CS J2.12 O5 LED5 1 CS direct
  P4.3 VDD 8 VCC +5V capacitor 100 nF to GND
  " 3 WP +5V
  J2.14 WAIT 7 HOLD direct
  21 GND 4 GND GND

mc-eeprom-conn.png
Enlarge
Schematic

Raspberry Pi can emulate SPI EEPROM. On RaspiElf the switches/LEDs are already connected to Raspi's GPIOs. No need for additional hardware. But I have to write an SPI server for the Raspberry Pi.

Raspi's SPI interfaces can't be used because of conflicting port usage.

  • BCM 19 (SPI1 MISO) O5
  • BCM 20 (SPI1 MOSI) -
  • BCM 21 (SPI1 SCLK) shutdown
  • BCM 18 (SPI1 CS0) CLR
  • BCM 17 (SPI1 CS1) WAIT

  • BCM 9 (SPI0 MISO) IN4
  • BCM 10 (SPI0 MOSI) IN3
  • BCM 11 (SPI0 SCLK) IN6
  • BCM 8 (SPI0 CS0) IN7
  • BCM 7 (SPI0 CS1) O0

http://www.netzmafia.de/skripten/hardware/RasPi/RasPi_SPI.html

Read Byte 


CS0     EQU     0b1101111
CS1     EQU     0b0010000
CLK0    EQU     0b1011111
CLK1    EQU     0b0100000
DATA0   EQU     0b0111111
DATA1   EQU     0b1000000

        ; MSB first

READBYTE:
        LDI     0
        PLO     R5
        LDI     0xFF
        PHI     R6
        LDI     0xFF - 8
        PLO     R6
        SEX     R0
BITLOOP:
        OUT4,0b01000000      ; CLK for SPI 
        OUT4,0b00000000
        INC     R6
        GHI     R6           ; set CARRY
        SHRC
        GLO     R5
        B4      SETBIT       ; branch if bit set
        SHL                  ; bit not set
        BR      SAVEBIT      
SETBIT:
        SHLC
SAVEBIT:
        PLO     R5
        GLO     R6
        BNZ     BITLOOP

about 230 cycles for one byte -> 1 ms -> 1 KiB takes about 1 s @ 1.79 MHz

Write Byte 

WRITEBYTE:
        LDI     0
        PHI     R6
        LDI     8
        PLO     R6
        SEX     R0
BITLOOP:
        GLO     R5           ; get the next bit
        SHLC                 , next bit is in the carry
        PLO     R5
        BDF     SETBIT
        OUT4,0b01000000      ; CLK for SPI with data bit cleared
        OUT4,0b00000000
        BR      NEXT
SETBIT:
        OUT4,0b11000000      ; CLK for SPI with data bit set 
        OUT4,0b10000000
NEXT:      
        DEC     R6
        GLO     R6
        BNZ     BITLOOP
Serial EEPROM patched on MC PCB

Serial EEPROM patched on MC PCB

SPI Mode 0, data is always latched in on the rising edge of SCK and always output on the falling edge of SCK. For CS one output port bis is needed e.g. O7 or N2 (INP4) to start/end operation (A high-to-low transition on the CS pin is required to start an operation and a low-to-high transition is required to end an operation).

SPI MC (Master) 25LCxxxx (Slave) Interface
MISO EF2 2 SO direct
MOSI D0 5 SI direct
CLK TPB & N1 (OUT2) 6 SCK wired AND; Pullup 10 k, 2 1N4148
CS N2 1 CS direct
    8 VCC +5V
    3 WP +5V
  J2.14 WAIT 7 HOLD direct
    4 GND GND

mc-eeprom-u1.png
Enlarge
Schematic

Read Byte 

        ; MSB first

        LDI     0
        PLO     R5
        LDI     0xFF
        PHI     R6
        LDI     0xFF - 8
        PLO     R6
        SEX     R6
BITLOOP:
        OUT2                 ; CLK for SPI, INC Rx
        GHI     R6           ; set CARRY
        SHRC
        GLO     R5
        B2      SETBIT       ; branch if bit set
        SHR                  ; bit not set
        BR      SAVEBIT      
SETBIT:
        SHRC
SAVEBIT:
        PLO     R5
        GLO     R6
        BNZ     BITLOOP

about 200 cycles for one byte -> 1 ms -> 1 KiB takes about 1 s

Write Byte 

WRITEBYTE:
        LDI     0
        PHI     R6
        LDI     8
        PLO     R6
        SEX     R0
BITLOOP:
        GLO     R5           ; get the next bit
        SHLC                 , next bit is in the carry
        PLO     R5
        LSNF
        OUT2,0b00000000      ; CLK for SPI with data bit cleared
        LSDF
        OUT2,0b00000001      ; CLK for SPI with data bit set 
        DEC     R6
        GLO     R6
        BNZ     BITLOOP

Kermit/ZModem

Kermit/ZModem

What about using KERMIT or ZMODEM protocol for the file transfer and use the file system on the host? No need to add additional hardware (SD-card is anyway to modern wink You could use an old CP/M or even a PDP11 as host. The C-Kermit Local Server mode, e.g. MC can read/write the blocks as files block.0, block.2, block.255.

The serial communication is really slow, not only because of the 9600 baud, but you have to wait after each character to give CDP1802 some computation time.

https://github.com/utoh/pygmy-forth/blob/master/extras/kermit/pfkerm.doc

-- Peter Schmid - 2019-01-24

Comments 

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