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> > | FIG-Forth - CDP1802 IP - Lattice FPGA-Board
FIG-Forth - CDP1802 IP - Lattice FPGA-BoardC-H Ting wrote the fine book FIG-Forth Manual: Documentation and Test in 1802 IP![]() CD1802 in VHDLThis project is an SOC (System on a Chip) coded in VHDL and implemented for the Lattice iCE40-hx8k dev board. The SOC contains the following components: 1802 CPU + UART + Timer + I/O Ports. Details and source see: Some more resources:
Night RiderSample LED chase program from: https://wiki.forth-ev.de/doku.php/projects:fig-forth-1802-fpga:start![]() ![]() COLD[CR] 1802 FIG-FORTH R0.4 3/16/81 : SET-LED 61440 C! ; [CR] OK : GET-LED 61440 C@ ; [CR] OK : DELAY 3000 0 DO LOOP ;[CR] OK : LEFT 7 0 DO GET-LED 2 * SET-LED DELAY LOOP ;[CR] OK : RIGHT 7 0 DO GET-LED 2 / SET-LED DELAY LOOP ;[CR] OK : RUN 1 SET-LED BEGIN LEFT RIGHT ?TERMINAL UNTIL ;[CR] OK RUN[CR] | |||||||